Abstract: With the urgent demand for high-density and high-reliability through-silicon via (TSV) packaging substrates in next-generation electronic equipment, this study focuses on the technical challenge of achieving low-temperature and low-stress silicon oxide deposition using existing mainstream processes. Based on the plasma-enhanced chemical vapor deposition (PECVD) methodology, this research investigates the development of a high-uniformity, high-deposition-efficiency, and low-stress silicon oxide deposition process for TSV substrates. Using the Taguchi experimental analysis, the influence of high-frequency power, low-frequency power, and chamber pressure on silicon oxide stress was investigated. The results indicate that the degree of impact on silicon oxide film stress, ranked from highest to lowest, is low-frequency power, followed by high-frequency power, and then chamber pressure. Consequently, the optimal process parameters for low-stress silicon oxide deposition were determined as follows: high-frequency power of 1 500 W, low-frequency power of 800 W, and chamber pressure of 2 500 mTorr. This configuration achieved a minimal stress result of 24.24 MPa, the corresponding process parameters provide a solution for low-stress, high-uniformity silicon oxide deposition.