Wafer-Level Polyimide Multi-Layer Interconnection Process and Reliability Investigation

With the rapid development of microelectronics technology, high integration, miniaturization, and high performance have become important trends in the design of electronic components and systems. Thin-film multilayer wiring technology, with its high-density interconnection, high-speed signal transmission, and excellent high-frequency characteristics, has become a key technology for achieving high-density integration in microsystem packaging. In this paper, a high-reliability wafer-level PI thin-film multilayer wiring preparation method is proposed. Through scheme design and process optimization, the method has overcome key technologies such as high-uniformity PI dielectric preparation, small-aperture high-precision metallized via preparation, and high-precision circuit line preparation. This method successfully achieves the preparation of 3 layers of PI dielectric and 4 layers of metal wiring, with a minimum via aperture of 30μm and a minimum line width/spacing of 30μm. Through reliability tests such as stability baking, temperature shock, and thermal shock, the results show that there are no significant differences in electrical performance and adhesion strength of the film layers compared to before environmental testing. Therefore, the developed substrate can meet the requirements for high-density, high-integration, and high-reliability radio-frequency microsystems.